Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series1/EFM32GG12B/EFM32GG12B530F512GQ100/LEUART1/ROUTEPEN#0x0
I/O Routing Pin Enable Register
RX Pin Enable
TX Pin Enable
https://github.com/cmsis-svd/cmsis-svd-data